For wireless transmitters, frequencies used for transmission are determined and it is required to have a certain frequency accuracy so as not to have adverse effects on apparatuses employing neighboring frequency bands. Particularly, for cellular and automobile telephones, a severe frequency accuracy is required to allow a large number of terminals to use the frequency. Since this frequency accuracy exceeds the accuracy of a high frequency oscillator, the frequency accuracy of the high frequency oscillator is improved by configuring a PLL circuit using a device having a high frequency accuracy, such as a crystal oscillator, as a reference signal. A PLL-based transmitter circuit can be configured in various ways as shown in FIGS. 3 to 5 of the non-patent document 1, and the configuration shown in FIG. 5 of the same is known as the ΣΔ configuration (also called the delta sigma configuration, but the ΣΔ configuration is used herein), which is a configuration suitable for higher integration and lower power consumption.
In the configuration shown in FIG. 5, a block labeled as VCO is a voltage controlled oscillator, which detects phase difference from a reference signal (fREF) through a phase detector (PD), and drives a control terminal of the VCO via a loop filter (LF) in order to control this frequency. Also, a charge pump circuit (not shown in the above document) may be inserted immediately before the LF to convert a PD output signal into a current value.
The phase detector compares two inputs and thus the both inputs must be the same in frequency. However, since frequencies of the crystal oscillator (for example, 13 MHz) used as a reference signal are lower than those used for cellular or automobile telephones (for example, about 900 MHz), the both inputs are matched by dividing the output of the VCO. For instance, if the reference signal is at 13 MHz, the VCO oscillates at 910 MHz to provide the same frequency accuracy as the reference frequency, when the frequency divider ratio is 70.
For cellular and automobile telephones, since a large number of terminals use radio waves, the individual terminals are controlled to avoid interference with each other by using different frequencies or by time sharing. For example, GSM (Global System for Mobile Communications) compatible cellular telephones set their channels at 200 kHz intervals, thus making it necessary to set the oscillating frequency of the VCO in increments of 200 kHz. However, since frequency divider ratio is an integer and the VCO frequency must be an integral multiple of a reference frequency, fine frequency setting is impossible. Therefore, it is necessary to generate pseudo intermediate frequencies by varying the frequency divider ratio in small increments. For example, if the frequency divider ratio is varied like 69, 70, 69, 70, it is possible to cause the VCO to oscillate at a frequency that is 69.5 times the reference frequency. This process of varying the frequency divider ratio is called ΣΔ modulation (or delta sigma modulation); the former designation (ΣΔ) is used herein.
Since using the ΣΔ modulation for frequency divider ratio allows fine control of frequency, fine frequency variation by modulating transmit data, as well as channel frequency setting can be implemented. This allows the configuration shown in FIG. 5 of the non-patent document 1 to be more of a full-featured modulator than a simple oscillator.
Not-patent document 1: E. Hegazi, A. A. Abidi, A 17-mW Transmitter and Frequency Synthesizer for 900-MHz GSM Fully Integrated in 0.35-um CMOS, IEEE Journal of Solid-State Circuits, Vol. 38, No. 5 pp. 782-792 May 2003.